Module 1.4 - Component Selection
Verifying component choices for reliability, availability, and correct electrical performance
Verifying component choices for reliability, availability, and correct electrical performance
Derating means selecting components with maximum ratings significantly above the actual operating conditions. This provides margin for manufacturing variations, environmental extremes, transients, and aging degradation. Standard derating guidelines: capacitor voltage 50% (use 10V-rated cap on 5V rail), resistor power 50% (use 0.25W resistor if dissipating 0.125W), MOSFET Vds 80%, semiconductor junction temperature 25C below maximum.
Derating is not conservative engineering - it is the minimum practice for reliable products.
Components operated at or near their maximum ratings have dramatically shortened lifetimes. A ceramic capacitor at 80% voltage rating has ~10x higher failure rate than one at 50% rating. Electrolytic capacitors at maximum temperature lose 50% of life for every 10C increase. Products designed without derating may pass initial testing but fail in the field within months, causing warranty costs, recalls, and reputation damage.
Buck converter output capacitor: Rail voltage: 3.3V. Selected capacitor: 22uF/10V X5R 0805. Derating: 10V / 3.3V = 3x (exceeds 2x minimum). At 3.3V DC bias, this X5R cap retains ~80% capacitance = 17.6uF effective. Still meets design requirement of 15uF minimum.
Current sense resistor: Maximum current: 2A. Resistor: 10mOhm. Power: (2A)^2 * 0.01 = 40mW. Selected: 0805 rated 0.125W. Derating: 125mW / 40mW = 3.1x. PASS.
Capacitor at limit: 5V rail uses 100nF/6.3V capacitor (only 1.26x voltage rating - no derating). At temperature extremes, voltage rating drops. DC bias effect on X5R at 5V/6.3V rating reduces effective capacitance to 40nF. Capacitor is essentially at its voltage limit and operating at reduced capacitance. Failure rate is 50x higher than properly derated part.
KiCad: Add custom fields for "Operating Voltage," "Derating Factor" to component properties. Generate BOM with these fields for derating review.
Altium: Use Parameter Manager to add derating columns. Create design rules that flag components with insufficient voltage margins.
OrCAD: Add user-defined properties for voltage/current derating to component instances. Export to spreadsheet for systematic review.
Every component has a specified operating temperature range. The design must ensure ALL components can operate correctly across the product's full environmental temperature range plus internal self-heating. This means checking not just the ambient temperature spec but also considering thermal rise from adjacent hot components and the component's own power dissipation.
Common grades: Commercial (0 to +70C), Industrial (-40 to +85C), Automotive (-40 to +125C), Military (-55 to +125C).
A product specified for -20C to +60C operation that uses a commercial-grade IC (0 to +70C) will fail at cold temperatures. Even if the ambient is +60C, self-heating inside the enclosure may push the IC to +90C (exceeding its +70C limit). Failures due to temperature are particularly dangerous because they are intermittent - the product may work perfectly in the lab but fail in the field during a heat wave or cold snap.
Outdoor industrial sensor (-40C to +85C ambient):
Internal temp rise: +20C (estimated from thermal simulation) Maximum junction temperature: 85 + 20 = 105C Component selection: - MCU: STM32L476RGT6 (Industrial: -40 to +105C) - covers 105C max - Flash: W25Q128JVSIQ (Industrial: -40 to +85C for storage, +105C operating) - Crystal: NDK NX3225SA-25.000MHz (Industrial: -40 to +85C, +/-20ppm) - Caps: All X7R or NP0 (stable to +125C) - LDO: TPS7A20 (Operating: -40 to +125C) ALL components cover the 105C worst case. PASS.
Outdoor product with commercial parts: Product must work at -20C to +50C ambient. Engineer selects commercial-grade ICs (0 to +70C) because "it's not extreme." In winter, ambient hits -20C and the MCU fails to start (minimum operating temperature is 0C). In summer, ambient +50C plus +25C internal rise = 75C junction temperature exceeds the 70C maximum. Product fails in both extremes. All ICs must be replaced with industrial grade - complete BOM respin.
KiCad: Add "Temp_Range" field to component properties. Filter BOM by temperature rating to find any commercial parts in an industrial design.
Altium: Use Component Parameters to include temperature range. Create BOM filter to highlight parts that don't meet the project temperature spec.
OrCAD: Use Property Editor to add temperature fields. Create BOM report sorted by temperature rating to quickly identify underrated parts.
Component availability verification ensures that every part in the BOM is currently in production (Active status), available from authorized distributors, and has adequate lead times for the project timeline. Parts should not be NRND (Not Recommended for New Designs), obsolete, or single-source with long lead times. Lifecycle status must be checked against manufacturer product lifecycle notices.
This check must happen BEFORE layout begins - discovering an obsolete part during procurement causes expensive redesign.
An obsolete or end-of-life component discovered during production procurement causes: emergency redesign ($10K-$100K), schedule delays (4-12 weeks for new layout), potential board respin if replacement has different footprint, and risk of counterfeit parts entering the supply chain if buyers source from unauthorized channels. The 2020-2023 semiconductor shortage demonstrated that even "available" parts can have 52+ week lead times.
BOM availability check results:
Part: STM32F407VGT6 (LQFP100) Status: Active (ST lifecycle: production) Stock: Digi-Key 5,432 pcs, Mouser 3,210 pcs Lead time: 16 weeks (factory), in-stock for immediate delivery Second source: None (ST proprietary) - RISK NOTED, 20 pcs safety stock ordered Part: TPS62130RGTR (QFN-16) Status: Active (TI: volume production) Stock: Available at 3 distributors, 10K+ units Lead time: 8 weeks standard Second source: Pin-compatible TPS62132 (higher current variant) documented
Discovery during procurement: BOM submitted for production ordering. Part MAX232CSE (SOIC-16) comes back as "NRND - limited stock only." Production needs 5,000 units but only 200 available globally. Alternative MAX3232 has different pinout and footprint. Board must be redesigned, new layout created, new prototypes built. 8-week delay and $45,000 additional cost. All because nobody checked availability before starting layout.
KiCad: Use KiCost plugin or external BOM tools (Octopart, Findchips) to batch-check availability. Export BOM in CSV format compatible with distributor BOM tools.
Altium: Use ActiveBOM with live supply chain data from Octopart/SiliconExpert. Shows real-time stock, lifecycle status, and pricing directly in the design tool.
OrCAD: Use BOM comparison tools or export to Octopart for supply chain analysis. Some versions integrate with SiliconExpert for lifecycle monitoring.
Second-source options are alternative parts from different manufacturers that can replace a primary component without design changes. For passive components, this means same value, tolerance, package, and specifications. For ICs, this means pin-compatible, functionally equivalent parts (e.g., SN74LVC1G08 from TI and 74LVC1G08 from Nexperia). Having documented second sources reduces supply chain risk.
Critical distinction: a second source must be a drop-in replacement, not merely "similar functionality."
Supply chain disruptions (factory fires, natural disasters, geopolitical events, pandemics) can make any single-source part unavailable for months or years. Without a pre-qualified second source, production stops entirely. Pre-qualifying alternatives means verifying they meet all electrical, thermal, and mechanical requirements - this takes time and should be done during design phase, not during a crisis. Companies with second-source strategies survived the 2020-2023 chip shortage far better than those without.
BOM with second sources:
U3: LM1117IMPX-3.3 (TI)
Alt 1: AMS1117-3.3 (AMS) - pin compatible, verified
Alt 2: AP1117E33G-13 (Diodes Inc) - pin compatible, datasheet reviewed
U7: SN74LVC1G08DBVR (TI, SOT-23-5)
Alt 1: 74LVC1G08GW (Nexperia) - same function, same pinout
Alt 2: NC7SZ08P5X (ON Semi) - verified compatible
C1-C20: 100nF 0402 X7R 16V
Approved: Samsung CL05B104KO5NNNC, Murata GRM155R71C104KA88,
TDK C1005X7R1C104K, Yageo CC0402KRX7R7BB104
Single-source everything: BOM specifies exact single-manufacturer part numbers with no alternatives documented. During production ramp, the USB PHY IC goes on allocation (26-week lead time). No second source was ever evaluated. The alternative from another vendor has a different register map requiring firmware changes, different package requiring PCB respin, and different clock requirements. Production halts for 4 months.
KiCad: Add "Alt_MPN_1", "Alt_MPN_2" fields to component properties. Include in BOM export for procurement flexibility.
Altium: Use Component Alternatives feature in Component Panel. Link alternate parts directly to each component for easy swap during procurement.
OrCAD: Use "Alternate Part" property in CIS (Component Information System). Or maintain alternatives in BOM spreadsheet with cross-reference data.
Moisture Sensitivity Level (MSL) per IPC/JEDEC J-STD-020 classifies components by how quickly they absorb moisture from the environment and the risk of damage during reflow soldering. MSL ratings range from 1 (unlimited floor life) to 6 (must be baked immediately before reflow). When moisture inside a package rapidly vaporizes during reflow, it creates internal pressure causing delamination, bond wire damage, or package cracking ("popcorn effect").
MSL must be managed in both design (BOM documentation) and manufacturing (handling procedures).
A BGA package with MSL-3 rating has only 168 hours (7 days) of floor life after opening the moisture barrier bag. If an assembly house opens the bag Monday but doesn't solder until the following Monday, the parts have exceeded their floor life. Reflow soldering then causes internal moisture to vaporize explosively - packages crack, solder joints fail internally, and the damage is invisible externally. These latent defects cause field failures weeks or months later.
BOM with MSL documentation:
U1: STM32F407VGT6 (LQFP100) - MSL-3, Floor life: 168 hours
Note: Store in dry cabinet when not in use. Bake 24hr@125C if expired.
U2: FPGA XC7A35T-1CPG236C (BGA236) - MSL-3, Floor life: 168 hours
Note: CRITICAL - track floor life from bag opening timestamp.
U3: TPS62130RGTR (QFN-16) - MSL-1, Unlimited floor life
J1: USB-C connector - MSL-1, Unlimited floor life
Assembly notes: "Track MSL-3 parts. Bake per J-STD-033 if floor life exceeded."
No MSL awareness: Assembly house receives 500 BGA ICs (MSL-3). Opens all moisture barrier bags at once for "efficiency." Parts sit on shelves for 3 weeks in uncontrolled humidity (60% RH). Boards are assembled and reflowed. 15% of BGAs develop internal delamination. Boards pass initial test but fail in field within 6 months as moisture-induced corrosion progresses. Root cause only identified after expensive failure analysis.
KiCad: Add "MSL" field to component properties. Include in BOM notes column. Create assembly documentation noting MSL-sensitive parts.
Altium: Add MSL as a component parameter. Use OutputJob to generate assembly notes with MSL warnings automatically included.
OrCAD: Add MSL property in CIS database. Generate assembly documentation that highlights parts requiring moisture-controlled handling.
Tolerance stack-up analysis evaluates how the combined tolerances of multiple components affect circuit performance at worst case. Every resistor, capacitor, and voltage reference has a tolerance (1%, 5%, 10%). When multiple tolerant components interact (voltage dividers, filters, timing circuits), their individual errors can add constructively, pushing circuit parameters beyond acceptable limits.
Worst-case analysis assumes all tolerances shift in the most harmful direction simultaneously (Murphy's Law).
A voltage divider with two 5% resistors has an output voltage uncertainty of approximately +/-10%. If this sets a regulator's output voltage, the "3.3V" rail could actually be 2.97V to 3.63V at worst case. This might exceed IC absolute maximum ratings at the high end or fail minimum operating voltage at the low end. Without tolerance analysis, a design that works perfectly with nominal components fails with worst-case production lots.
TPS62130 feedback divider analysis:
Target output: 3.3V. Vref = 0.8V R_top = 31.6k 1%, R_bot = 10k 1% Nominal: Vout = 0.8V * (1 + 31.6k/10k) = 3.328V Worst case HIGH: R_top +1%, R_bot -1% Vout = 0.8V * (1 + 31.916k/9.9k) = 3.379V (+1.5%) Worst case LOW: R_top -1%, R_bot +1% Vout = 0.8V * (1 + 31.284k/10.1k) = 3.278V (-1.5%) Range: 3.278V to 3.379V Spec: 3.3V +/- 5% = 3.135V to 3.465V PASS with 3.5% margin to spec limits.
Voltage divider with 5% resistors: Same TPS62130 with R_top = 33k 5%, R_bot = 10k 5%. Worst case HIGH: 0.8 * (1 + 34.65k/9.5k) = 3.717V. STM32 VDD absolute maximum = 3.6V. EXCEEDED. The regulator can output a voltage that damages the MCU. With 5% parts, this will happen in approximately 1 in 1000 production boards (when both resistors happen to be at extreme tolerance in the wrong direction).
KiCad: Add tolerance calculations as text notes near critical circuits. No automated tolerance analysis - use external spreadsheet or Monte Carlo simulation tool.
Altium: Use simulation with parameter sweep for tolerance analysis. Set component parameters to min/max and simulate circuit performance at extremes.
OrCAD/PSpice: Use .MC (Monte Carlo) analysis with .DEV and .LOT specifications to run statistical tolerance analysis. 1000-point Monte Carlo shows probability distribution of outputs.