Module 1.10 - Connectors
Verifying connector selection, pin assignments, and mechanical reliability
Verifying connector selection, pin assignments, and mechanical reliability
Standard connectors (USB, HDMI, Ethernet RJ45, CAN DB9, RS-232 DB9, SD card, JTAG) have defined pin assignments specified by their respective standards. The schematic must connect signals to the correct pin numbers as defined in the interface specification. Non-standard pin assignments on standard connectors cause interoperability failures and potential hardware damage (power on wrong pins).
For custom connectors (board-to-board, sensor, expansion), pin assignments should follow best practices: power/ground on first-mate pins, signals in logical groups.
A USB connector with D+ and D- swapped will never enumerate with any host. An Ethernet jack with TX+/TX- on the wrong pins won't link with any switch. A JTAG header with reversed pinout will damage the target or debugger. Standard connectors MUST follow the standard - there is zero flexibility. For custom connectors, inconsistent pin assignments between boards in a system cause expensive cables or adapter boards, and create risk of plugging in backwards (power short).
USB Type-C receptacle pin assignment:
Per USB Type-C Specification Table 3-2: A1/B12: GND A12/B1: GND A2/B11: TX1+/TX2+ A11/B2: RX2+/RX1+ A3/B10: TX1-/TX2- A10/B3: RX2-/RX1- A4/B9: VBUS A9/B4: VBUS A5: CC1 B5: VCONN A6/B6: D+ A7/B7: D- A8/B8: SBU1/SBU2 Verified against connector manufacturer datasheet (Amphenol 12401610E4#2A): Physical pin numbers match schematic symbol pin numbers. D+ and D- correctly connected to USB PHY. CC1/CC2 connected to USB PD controller. VBUS through current limiter and ESD protection.
JTAG header wrong standard: Designer uses ARM 20-pin JTAG header but assigns pins according to the old Parallel Port JTAG adapter pinout (different standard). When standard J-Link or ST-Link debugger is connected, SWDIO connects to the wrong pin (actually connected to GND on the board). Debugger cannot communicate. Worse: if VTREF is connected to a signal output, the debugger's reference voltage regulator may be damaged.
KiCad: Use official connector symbols from KiCad library (verified against standards). For USB-C, use the pre-verified USB_C_Receptacle symbol. Verify pin mapping in symbol properties.
Altium: Use manufacturer-provided symbols with verified pin mapping. Import from SnapEDA or Ultra Librarian with verification against datasheet.
OrCAD: Verify connector symbols against physical pin numbering in manufacturer datasheet. Create custom symbols with correct pin assignments for non-standard connectors.
Keying ensures connectors can only be mated in the correct orientation, preventing backwards insertion that could short power to ground or connect signals to wrong pins. Polarity enforcement uses mechanical features (notches, asymmetric shapes, missing pins, polarized housings) or electrical features (diode protection, series fuses on power pins) to prevent damage from incorrect connection. Every power connector and signal connector in the design must be evaluated for keying adequacy.
The question is not "will users connect it wrong?" but "when users connect it wrong, what happens?"
A 2x5 header with power on pin 1 and ground on pin 9 - if inserted one row offset, power and ground short through adjacent pins, potentially destroying regulators, ICs, and blowing fuses. A non-keyed 4-pin connector for a motor (with power and direction signals) inserted rotated 180 degrees sends power voltage directly into a GPIO pin. Field failures from mis-insertion cost thousands in warranty repairs and destroy customer confidence. Keying costs pennies per connector.
Keyed power and signal connectors:
Power input: JST-PH 2-pin connector (B2B-PH-K-S) - Polarized housing: physically impossible to insert backwards - Positive on pin 1 (longer pin, mates first for hot-plug safety) - Additional: reverse polarity P-MOSFET on board for cable wiring errors JTAG debug: Samtec FTSH-105 (2x5 pin, 1.27mm shrouded header) - Shrouded housing with notch on pin 1 side - Cable can only connect in one orientation - Pin 1 indicated by triangle on PCB silkscreen Sensor inputs (3 identical sensor ports): - Port A: JST-ZH 4-pin (red cable) - Port B: JST-GH 4-pin (blue cable, different connector family) - Port C: JST-SH 4-pin (white cable, different connector family) - Impossible to swap cables between ports (different mating connectors)
Non-keyed headers: Three identical 2x3 pin headers on the board: one for JTAG, one for UART, one for I2C sensor. All use standard 2.54mm male headers with no shroud. During production, assembly technician plugs UART cable into I2C header and I2C cable into JTAG header. UART TX (3.3V output) drives directly into JTAG TMS input (damages debug interface). I2C sensor receives 0x00 continuously from unpowered UART adapter, corrupts sensor configuration registers permanently.
KiCad: Specify exact connector part number with keying variant in schematic. Use 3D model preview to verify physical keying. Add polarization marking to PCB silkscreen.
Altium: Include 3D model of connector showing keying features. Use component parameters to specify polarized variant. Assembly layer shows correct insertion direction.
OrCAD: Specify full MPN including keying options in BOM. Add assembly notes indicating connector orientation. Include connector mating diagram in assembly documentation.
Every connector pin has a maximum current rating specified by the manufacturer (typically 1-5A for standard connectors, 0.5-1A for fine-pitch). When a design requires more current than a single pin can handle, multiple pins must be paralleled for power delivery. The current rating must account for contact resistance, temperature rise, derating at elevated ambient temperature, and aging degradation over mating cycles.
Total available current = rated_current_per_pin * number_of_parallel_power_pins * derating_factor (typically 0.8).
Exceeding a connector pin's current rating causes resistive heating at the contact interface (P = I^2 * R_contact). Over time, this heating causes oxidation of the contact surface, which increases resistance, which increases heating - a positive feedback loop that leads to thermal runaway, melted plastic housing, and eventual open circuit (loss of power) or fire. A connector rated for 3A per pin that carries 5A will initially work fine but develop increasing contact resistance over weeks/months until failure.
Board-to-board power connector:
Connector: Samtec TMM-110 (2x10 pin, 2.54mm, rated 3A per pin) System current requirement: 8A at 3.3V Pin assignment: Pins 1,3,5,7: VCC_3V3 (4 power pins * 3A = 12A capacity) Pins 2,4,6,8: GND (4 ground pins * 3A = 12A return capacity) Pins 9-20: Signal pins Current per power pin: 8A / 4 = 2A (66% of 3A rating - properly derated) Contact resistance: 20 mOhm per pin (from datasheet) Voltage drop per pin: 2A * 0.020 ohm = 40mV Total power connector loss: 40mV (acceptable, < 2% of 3.3V) Temperature rise at 2A: < 10C above ambient (per manufacturer curves) Rating maintained over 500 mating cycles (connector lifecycle spec).
Single pin power delivery: System draws 4A from a 2-pin JST connector (rated 2A per pin). Single VCC pin carries 4A = 200% of rating. Single GND pin returns 4A = 200% of rating. Contact temperature rises 45C above ambient. After 100 insertion cycles, contact resistance increases to 100mOhm (oxidation). Voltage drop: 4A * 0.1ohm = 0.4V. Supply at board input: 3.3V - 0.4V = 2.9V. MCU brownout resets begin. Eventually connector plastic melts and fails open.
KiCad: Document current per pin in schematic notes near connector. If paralleling pins, show all connections explicitly (do not rely on copper pour to distribute current).
Altium: Use Net Ties or explicit parallel connections for multi-pin power. Document current allocation in component parameters.
OrCAD: Show all parallel power pin connections explicitly on schematic. Add current rating annotation to connector symbol for review visibility.
Mating force is the physical force required to connect and disconnect a connector. It affects user experience, assembly ease, and mechanical stress on the PCB. Mating cycle rating defines how many insertions/removals the connector survives while maintaining electrical specifications. These parameters must match the product's use case: debug connectors need 100+ cycles, consumer ports need 10,000+ cycles, permanent connections need only 1-3 cycles but must withstand vibration.
The connector's mating cycle rating directly determines product lifetime for user-facing ports.
A USB connector rated for 10,000 cycles that is inserted/removed 10 times per day reaches end-of-life in less than 3 years. At end-of-life, contact resistance increases, intermittent connections occur, and eventually the port fails completely. If the product has a 5-year lifetime requirement, a 10,000-cycle connector is inadequate. Conversely, a high-mating-force connector (designed for permanent connection) used as a user-removable port is difficult to use and may damage the PCB solder joints when users pull at wrong angles.
USB-C connector selection for consumer device:
Usage: Smartphone charger connector Insertion frequency: 3 times/day Product lifetime: 5 years Required cycles: 3 * 365 * 5 = 5,475 cycles Selected: USB-C receptacle rated 10,000 cycles (1.8x margin over requirement) Mating force: 8N-20N (within USB-IF specification for Type-C) Retention force: > 8N (stays connected when phone is picked up by cable) PCB mounting: Mid-mount SMD with through-hole anchor pins Anchor pins soldered for mechanical strength Provides > 30N pull-out strength (survives cable-yank abuse) Vibration: Connector + board tested per IEC 60068-2-6 (10-500Hz, 3g) No intermittent contact detected during vibration.
Wrong connector for application: Industrial equipment in a vehicle with constant vibration. Board-to-board connection uses standard 2.54mm pin headers with no locking mechanism. Mating force: 2N per pin (low retention). Under vehicle vibration (5-50Hz, 2g), connector gradually works loose over 6 months. Intermittent contact causes random sensor dropouts. Eventually fully disconnects. Board-to-board connection in high-vibration environment requires latching connectors (Molex Micro-Fit, HARTING) not pin headers.
KiCad: Document cycle rating and mating force in connector component fields. Specify mounting type (through-hole anchors) in PCB footprint selection.
Altium: Include mechanical specifications in component parameters. 3D model verification ensures mounting features are correct. Specify anchor pins in assembly documentation.
OrCAD: Add lifecycle/cycle rating to connector properties. Specify mounting style in PCB constraints. Reference manufacturer lifecycle test reports.
Signal-to-ground pin ratio determines the quality of signal return paths within a connector. For high-speed signals, each signal pin ideally has an adjacent ground pin to provide a low-inductance return path. For lower-speed designs, a ratio of 3:1 (signal:ground) may be acceptable. The ground pin placement should create controlled impedance paths and minimize crosstalk between adjacent signal pins.
Poor ground pin allocation is a primary cause of EMI from cables and signal integrity degradation through connectors.
Every signal current must return through a ground path. If 10 high-speed signals share a single ground pin, all return currents squeeze through that one pin's inductance (~1nH for a connector pin), creating a common-mode voltage: V_noise = L * (sum of all di/dt from all signals). This noise appears on all signals as crosstalk, radiates from the cable as EMI, and can corrupt data. For differential pairs (USB, Ethernet, HDMI), ground pins adjacent to the signal pair are mandatory for impedance control.
High-speed expansion connector (80-pin):
Pin assignment strategy: Pins 1-4: GND, PCIE_TX+, PCIE_TX-, GND (G-S-S-G for diff pair) Pins 5-8: GND, PCIE_RX+, PCIE_RX-, GND (G-S-S-G for diff pair) Pins 9-12: GND, USB_DP, USB_DM, GND (G-S-S-G for USB) Pins 13-16: VCC, VCC, GND, GND (power block) Pins 17-24: GND, SPI_CLK, SPI_MOSI, GND, SPI_MISO, SPI_CS, GND, GND ... (pattern continues) Statistics: Total pins: 80 Ground pins: 30 (37.5%) Signal pins: 42 Power pins: 8 Signal-to-ground ratio: 42:30 = 1.4:1 (excellent for high-speed) Every high-speed pair has dedicated ground pins. No signal is more than one pin away from a ground reference.
Minimal ground allocation: 20-pin expansion connector: pins 1-2 = VCC, pins 3-19 = signals (SPI, UART, I2C, GPIO), pin 20 = GND. Ratio: 17 signals : 1 ground = 17:1. All 17 signal return currents share one ground pin. At SPI speed (20MHz), common-mode noise on the cable: V_cm = 1nH * 17 * 20mA * 20MHz = 6.8V of induced noise! Massive EMI radiation from cable. I2C unreliable due to ground bounce. UART bit errors when SPI is active.
KiCad: When assigning connector pins, explicitly allocate ground pins adjacent to high-speed signals. Document the pin assignment table on schematic showing ground distribution.
Altium: Use connector pin planning tools. Create pin-assignment diagrams showing signal-ground pairing. Simulate connector impedance with SI tools.
OrCAD: Document pin assignment with ground distribution in schematic. Use tabular format showing pin function and adjacencies.
Mechanical retention ensures connectors remain securely mounted to the PCB and mated cables stay connected under mechanical stress (vibration, cable pull, thermal cycling). Retention features include: through-hole solder anchors, board-lock clips, screw mounting, strain relief, and locking latches on the mating connector. The mounting must withstand the maximum force from cable weight, accidental pulls, and environmental vibration without cracking solder joints or delaminating PCB pads.
Connector failure from inadequate mechanical retention is the #1 hardware failure mode in field-deployed electronics.
An SMD USB connector with only its signal pads soldered to the PCB has maybe 5-10N pull-out strength. A user tripping over a USB cable generates 50-100N of force. The connector rips off the PCB, taking copper pads with it - irreparable damage requiring board replacement. In vibration environments (automotive, industrial, drone), any connector without positive locking will eventually work loose. This is not a theoretical risk - it is the most common field failure mechanism in electronics, yet the most preventable.
USB-C connector with robust mounting:
Connector: Amphenol 12401610E4#2A (USB-C mid-mount receptacle) Signal pads: SMD solder (carries signals only, minimal mechanical load) Anchor tabs: 4x through-hole solder tabs (carries mechanical load) Pull-out force with anchors: > 50N (manufacturer tested) Cable pull force from 1m USB cable with device weight: ~15N Safety margin: 50N / 15N = 3.3x (acceptable) Additional provisions: - PCB cutout under connector body for mid-mount style - Connector shell soldered to ground pour (EMI shielding + mechanical strength) - Board-level potting compound option for extreme vibration (military/auto) PCB design: Anchor pads connected to internal copper plane for heat dissipation during soldering and maximum peel strength.
SMD-only power connector: DC barrel jack (requires 20N extraction force from mated plug) soldered with only 3 SMD pads, no through-hole anchors. PCB pad area: 2mm x 1.5mm each. Peel strength per pad: ~5N. Total: 15N. When user pulls DC plug at slight angle: force concentrates on one pad, exceeds 5N, pad delaminates from PCB (takes copper with it). Connector partially lifts. Intermittent power connection causes random resets. Eventually breaks completely. Board scrapped - pads cannot be repaired.
KiCad: Verify PCB footprint includes mechanical anchor pads. Check 3D model for mounting features. Add assembly note for any epoxy/potting requirements.
Altium: 3D model check for mechanical features. PCB design rules for minimum pad size on connector anchors. Assembly documentation includes torque specs for screw-lock connectors.
OrCAD: Verify footprint mechanical features match connector datasheet. Include mounting hardware (screws, standoffs) in BOM. Document assembly requirements.