Module 4.4 - Grounding Strategy
Design review checkpoints for establishing effective grounding architectures that minimize EMI and ensure signal integrity
Design review checkpoints for establishing effective grounding architectures that minimize EMI and ensure signal integrity
The grounding topology must be chosen based on the frequency content of the signals and the physical size of the system relative to wavelength. This is one of the most fundamental EMC decisions and affects every aspect of system performance.
Ground conductor impedance vs. frequency:
Single wire ground (1mm diameter, 10cm length):
DC resistance: R = rho * L / A = 1.7e-8 * 0.1 / (pi*(0.5e-3)^2) = 2.2 mohm
Inductance: L = 0.2 * l * [ln(2l/r) - 1] nH = 0.2 * 100 * [ln(200/0.5) - 1] = 100 nH
At 1 MHz: Z = sqrt(R^2 + (wL)^2) = sqrt(0.0022^2 + (2*pi*1e6*100e-9)^2) = 0.63 ohm
At 100 MHz: Z = 63 ohm (inductive, useless as ground!)
Ground plane (10cm x 10cm, 35um copper):
DC resistance: negligible (distributed)
Inductance per square: L_sq = mu_0 * t / 3 = 4*pi*10^-7 * 35e-6 / 3 = 14.7 pH/square
At 100 MHz: Z_sq = 2*pi*100e6 * 14.7e-12 = 9.2 mohm/square
For 10cm path: Z = 9.2 mohm (excellent ground even at 100 MHz!)
Conclusion: Ground planes provide 6800x lower impedance than wires at 100 MHz.
Always use ground planes for digital and RF systems.
Mixed-signal system with hybrid grounding: System has 24-bit ADC (analog section, DC-10 kHz signals) and ARM processor (digital section, 100 MHz clock). Grounding: Solid ground plane on Layer 2 split into analog and digital regions. Split connected at a single point under the ADC (where the ADC connects both grounds). Additional 10 nF capacitor bridges the split at 2 other points for high-frequency RF continuity. Low-frequency analog currents stay in analog ground; high-frequency digital return currents see a continuous plane.
Digital system with single-point ground attempt: 200 MHz FPGA board with ground plane connected to chassis via a single bolt (single-point concept applied incorrectly to high-frequency system). The 10 cm ground conductor from PCB ground to chassis has 100 nH inductance. At 200 MHz: impedance = 126 ohm. This creates massive ground bounce and increased radiation as the PCB ground floats relative to chassis at RF frequencies.
Splitting ground planes on digital boards: For purely digital PCBs, NEVER split the ground plane. A split forces return current to find an alternate path, increasing loop area and radiation. Only split grounds when you have a genuine mixed-signal architecture with clearly separated analog and digital sections.
Confusing signal ground with safety ground: EMC grounding and safety grounding serve different purposes. Safety ground (green/yellow wire) must meet IEC 60950/62368 bonding requirements regardless of EMC considerations.
The connection between PCB signal ground and chassis/enclosure ground must be low impedance at the highest frequency of concern. This connection determines how effectively the enclosure shields against both emissions and susceptibility, and how well cable shield terminations function.
PCB-to-chassis with proper multi-point grounding: PCB mounted with 8 M3 screws around perimeter, spaced 25 mm apart. Each screw location has 6mm diameter pad connected to ground plane on all layers via 8 vias (0.3mm). Star washers bite through any surface oxidation. Additional BeCu spring fingers at 15mm spacing along card edges provide intermediate ground points. Measured impedance: less than 1 mohm DC at each point. Transfer impedance measured with TDR shows less than 50 mohm up to 1 GHz.
PCB with single ground bolt and wire: PCB mounted on plastic standoffs (isolated from chassis). Single 16 AWG wire from PCB ground pad to chassis lug point. Wire length: 8 cm. Inductance: approximately 80 nH. At 300 MHz (3rd harmonic of 100 MHz clock): Z = 150 ohm. PCB ground is effectively floating at RF -- enclosure provides zero shielding at frequencies above 10 MHz. All cable emissions problems exacerbated.
Impedance Measurement: Use a vector network analyzer (VNA) to measure the transfer impedance from PCB ground to chassis. Connect Port 1 to PCB ground near a sensitive IC. Connect Port 2 to chassis. Measure S21 (transfer) from 100 kHz to 1 GHz. Convert to impedance: Z = 2 * Z0 * S21 / (1 - S21). Target: Z < 10 mohm up to 100 MHz for good performance.
Ground plane segmentation (splitting) is sometimes necessary to isolate noisy circuits from sensitive ones, but it must be done with full understanding of the consequences. An unjustified ground split can cause more EMC problems than it solves by increasing loop areas and disrupting return current paths.
If a ground split IS justified, the connection between sections must be controlled:
1. Single-point connection (for low-frequency isolation):
- Connect ground planes at ONE point, directly under the mixed-signal IC
- Copper bridge width: minimum 1mm (wider is better for DC resistance)
- Place the ADC/DAC straddling the split so it defines the connection point
2. Capacitive bridge (for hybrid grounding):
- Multiple ceramic capacitors (10 nF - 100 nF) bridging the split
- Spacing: every 10-20mm along the split
- These provide low impedance at RF while blocking DC/low-frequency currents
- Example: 100 nF C0G ceramic, Z at 10 MHz = 0.16 ohm (good bridge)
3. Ferrite bridge (for selective isolation):
- Ferrite bead connecting grounds provides DC short, high-frequency isolation
- Example: BLM18PG221SN1 (220 ohm at 100 MHz)
- Allows DC and low-frequency currents while blocking RF noise
Rules for traces crossing a split:
- NEVER route high-speed signals across a ground split
- If a signal MUST cross, route it over the bridge point only
- OR use a controlled bridge (capacitor) at the crossing point for return current
24-bit ADC system with justified split: ADC (ADS1256) straddles analog/digital ground split. Analog section: precision voltage reference, instrumentation amplifier, anti-aliasing filter -- all on analog ground. Digital section: MCU, SPI bus, USB interface -- all on digital ground. Bridge point: 2mm wide copper under the ADC package connecting AGND and DGND pins. No digital traces cross into analog region. Analog signals stay within analog region until digitized. Measured noise floor: 0.3 uVrms (achieves 21 effective bits).
Unjustified split with signals crossing: Designer split ground plane into "analog" and "digital" sections. But SPI clock (10 MHz) from ADC must route from digital section to ADC in analog section -- crosses the split. Return current for SPI clock must detour 3 cm around the split edge, creating a 3 cm x 4 mm loop = 12 mm^2 antenna. This single trace crossing causes 15 dB increase in radiated emissions at 10 MHz and its harmonics. The split made EMC WORSE, not better.
The "moat" topology mistake: Creating a complete moat (split all the way around) around the analog section with only one bridge point. If the bridge point has any inductance (single via, narrow trace), it becomes the highest-impedance point for ALL return currents and defeats the purpose of the ground plane.
Splitting power planes instead of ground: If you must isolate power domains, split the POWER plane (not ground). Keep ground continuous everywhere. Power plane splits are less harmful because power planes carry DC, not return currents for signals.
Star grounding connects multiple circuits to a common ground point through individual conductors, preventing current from one circuit from developing a voltage drop in another circuit's ground path. This is essential for precision analog systems where microvolts of ground noise can cause measurement errors.
Multi-channel DAQ with proper star grounding: 8-channel ADC system. Each channel's instrumentation amplifier has its own ground return trace (0.5mm wide, max 20mm long) running directly to the ADC AGND pin (star point). Voltage reference REFGND also connects to this star point. Digital ground (MCU, SPI, USB) connects to a separate ground region that meets the analog ground only at the ADC DGND pin. No analog signal traces share a via with digital signals. Achieved ENOB: 22.1 bits (theoretical max: 23.5).
DAQ with shared ground path: ADC analog ground and digital ground both connect to a common ground plane without star topology. High-current USB driver (100 mA transients at 480 MHz) ground return flows through the same ground plane region as the ADC reference. Ground noise of 2 mV at 480 MHz appears across ADC reference pins. Even though ADC bandwidth is low, the rectified/aliased noise increases effective noise floor. Measured ENOB: 16.2 bits instead of expected 22 bits.
Cable shield effectiveness is determined almost entirely by how the shield is terminated at each end. A 360-degree (circumferential) termination to the chassis/connector shell provides the lowest transfer impedance and maximum shielding effectiveness. Any departure from 360-degree termination (such as a pigtail wire) dramatically reduces shielding at high frequencies.
HDMI cable with proper shield termination: HDMI connector shell crimped directly to cable braid shield with 360-degree contact. Connector shell mates with receptacle shell on PCB, which is grounded to chassis ground plane via 12 ground pins around the connector perimeter. No pigtail anywhere in the shield path. Measured shielding effectiveness: > 60 dB from 30 MHz to 3 GHz. Common-mode current on cable: less than 2 uA at any harmonic.
Shielded sensor cable with pigtail: Shielded cable with braided shield terminated via 30mm pigtail wire to a screw terminal. At 200 MHz: pigtail inductance = 30 nH, Z = 37.7 ohm. With 10 uA of common-mode current on the cable: voltage injected into signal = 37.7 * 10e-6 = 0.377 mV. For a 10 mV full-scale sensor, this is 3.8% error. The shield is providing ZERO benefit above 50 MHz. Solution: use a shielded connector with 360-degree termination or a bulkhead feedthrough.
Single-end vs. both-ends grounding debate: For EMC purposes, shield should be grounded at BOTH ends. Grounding at one end only provides electrostatic shielding but no magnetic shielding above the cable resonant frequency. The "ground loop" concern is valid only for audio frequencies -- at RF, both-end grounding is always superior. For mixed-frequency systems: ground both ends for RF, add series capacitor (10 nF) at one end if low-frequency ground loop is a concern.
Shield grounding through the connector signal pins: Some designs route the shield connection through a signal ground pin inside the connector. This adds the pin inductance (~2 nH) in series with the shield path. Always terminate shield to the connector SHELL, not to an internal pin.
Ground loops form whenever there are multiple paths between two ground points. The loop acts as a receiving antenna for external magnetic fields and as a transmitting antenna for internal noise currents. The voltage induced in a ground loop is proportional to the loop area, making area minimization the primary defense.
Multi-board system with minimized ground loops: Three PCBs in a chassis connected via backplane. Each board connects to chassis ground at its mounting points. Inter-board signals use LVDS (differential, 100 mV common-mode tolerance = 200 mV). Backplane ground plane connects all board grounds with less than 5 mohm impedance. Ground loop area between boards: effectively zero (signals and grounds route together on backplane). No ground-loop-induced noise observed in any measurement.
Single-ended signals between distant modules: Analog sensor (4-20 mA loop) runs 50m between a field sensor and control room via single twisted pair. Ground referenced at both ends through separate earth connections (building steel). Ground loop area: 50m x 3m (cable height above ground) = 150 m^2. At 50 Hz with B = 0.5 uT: V_induced = 150 * 0.5e-6 * 2*pi*50 = 23.6 mV. For a 4-20 mA signal through 250 ohm resistor (1-5V), this is 0.6% error at 50 Hz. Solution: use isolated 4-20 mA transmitter or galvanically isolated receiver.
Ground Loop Detection: Inject a 100 Hz sine wave (1V amplitude) at one ground point relative to another using a signal generator. Measure the received voltage at the sensitive circuit input. If ground loop exists, you will see the injected signal at a level determined by the transfer function. This reveals ground loop coupling paths during prototype testing.