Tutorial 5.8: Mechanical & Enclosure Fit
Verifying PCB integration with enclosure, connectors, mounting hardware, and mechanical constraints
Verifying PCB integration with enclosure, connectors, mounting hardware, and mechanical constraints
A PCB that works electrically but does not fit its enclosure is useless. Mechanical integration verification must happen early and continuously throughout the layout process. The most common reason for PCB respins in production is mechanical interference - not electrical failures. This checkpoint ensures the board physically fits, connectors align, and assembly is feasible.
| Issue Category | Discovery Stage | Cost Impact | Prevention Method |
|---|---|---|---|
| Board outline wrong | First prototype assembly | Full respin (4-8 weeks) | DXF import from MCAD + dimensional verification |
| Connector misalignment | Prototype assembly | Respin or mechanical rework | 3D model fit check with tolerance analysis |
| Height interference | Enclosure assembly | Component relocation (respin) | 3D collision detection before tape-out |
| Mounting hole position error | Assembly | Board stress or respin | Verify hole coordinates against MCAD datum |
| Missing keep-out | System integration test | Component damage or respin | Import complete mechanical model with all features |
| Format | Direction | Content | Supported Tools |
|---|---|---|---|
| STEP (AP214) | ECAD to MCAD | 3D board + components | All major tools |
| IDF 3.0 | Bidirectional | Board outline, placement, heights | Legacy, widely supported |
| IDX (IPC-2581) | Bidirectional | Full design data exchange | Newer tools (Altium, Allegro) |
| DXF/DWG | MCAD to ECAD | 2D outlines and keep-outs | All tools (2D only) |
| Native (CoDesigner) | Bidirectional real-time | Full synchronization | Altium + SolidWorks/Inventor |
| VRML (.wrl) | ECAD to MCAD | 3D visualization (no parametric) | KiCad export, browser viewing |
The PCB board outline exactly matches the mechanical drawing dimensions within manufacturing tolerance. All corners, notches, cutouts, and curved sections are correctly defined. Board thickness matches the enclosure slot/guide dimensions.
| Feature | Minimum Value | Recommended | Notes |
|---|---|---|---|
| Outline tolerance (routed) | +/- 0.15mm | +/- 0.1mm | Better tolerance costs more |
| Internal corner radius | 0.5mm | 1.0mm | Limited by router bit diameter |
| Minimum slot width | 0.8mm | 1.0mm | Router bit minimum diameter |
| Slot length minimum | 1.5mm | 2.0mm | Router bit engagement length |
| Board edge to copper | 0.2mm | 0.3mm | Prevents copper exposure at edge |
| Board edge to component | 0.5mm | 1.0mm | Assembly pick-and-place clearance |
| V-score to component | 1.0mm | 2.0mm | Stress zone during depanelization |
Use File > Import > DXF/DWG to import the enclosure outline onto the mechanical layer. Then use Design > Board Shape > Define from Selected Objects to create the board outline. Alternatively, use Place > Board Region for complex shapes. For MCAD collaboration, use the native CoDesigner plugin for real-time synchronization with SolidWorks, Inventor, or CATIA.
Import DXF to the Edge.Cuts layer via File > Import > Graphics. Ensure all lines form a closed polygon. KiCad requires the board outline to be a single closed shape on Edge.Cuts. For MCAD collaboration, export as STEP (File > Export > STEP) and verify in the mechanical CAD tool.
Import DXF via File > Import > DXF to the Board Geometry/Outline subclass. Use Shape > Compose Shape to create the board outline from imported geometry. For MCAD integration, use the IDX or IDF format exchange, or Cadence's direct integration with PTC Creo.
Mechanical drawings often show internal corners as sharp 90-degree angles (because the enclosure is CNC milled with tiny end mills). The PCB, however, is routed with a 1.0mm or larger diameter router bit, requiring all internal corners to have at least 0.5mm radius. If sharp internal corners are needed, the fabricator must drill the corner first, then route - adding cost and potential stress concentration. Always add fillet radii to internal corners in the PCB outline.
| Method | Min Board Size | Keep-Out from Edge | Best For |
|---|---|---|---|
| V-Score (Scored) | 30 x 30mm | 1.0mm from score | Rectangular boards, no overhanging components |
| Tab-Route (Breakaway) | Any size | 2.0mm from tab | Irregular shapes, boards with edge components |
| Stamp Hole (Perforated) | Any size | 1.5mm from holes | Gentle separation required (flex circuits) |
| Combination | Varies | Per method | Complex boards with mixed requirements |
All mounting holes are placed at exact positions specified in the mechanical drawing. Hole diameters, pad sizes, and plating specifications match requirements. Copper keep-out around mounting holes adequate for screw head clearance and voltage isolation.
| Screw Size | Hole Diameter (PTH) | Hole Diameter (NPTH) | Pad Diameter (min) | Keep-Out Radius |
|---|---|---|---|---|
| M2 | 2.2mm | 2.1mm | 4.0mm | 3.5mm |
| M2.5 | 2.7mm | 2.6mm | 4.5mm | 4.0mm |
| M3 | 3.2mm | 3.1mm | 5.5mm | 4.5mm |
| M4 | 4.3mm | 4.2mm | 7.0mm | 5.5mm |
| #4-40 | 3.0mm | 2.9mm | 5.0mm | 4.5mm |
| #6-32 | 3.6mm | 3.5mm | 6.0mm | 5.0mm |
M3 mounting holes at exact positions from mechanical drawing (+/- 0.05mm). Plated through-hole connected to all ground planes with direct connection (no thermal relief). Keep-out zone of 4.5mm radius on all layers (no components, no routing). Bottom side has clearance for M3 nut + washer (8mm diameter). Silkscreen circle marks the keep-out boundary.
Mounting holes placed at "approximate" positions without verifying against mechanical drawing. One hole is 0.5mm off, causing stress when board is screwed down. Traces route within 1mm of hole (risk of cracking from screw torque). No keep-out defined on bottom side - a capacitor is under the screw head area and will be crushed.
All external-facing connectors align precisely with their enclosure panel cutouts. Connector mating face height, lateral position, and depth match the panel opening within tolerance. Cable connectors have adequate bend radius clearance.
Total position tolerance from connector to panel cutout:
T_total = sqrt(T_pcb^2 + T_mount^2 + T_enclosure^2 + T_connector^2)
Where:
T_pcb = PCB outline tolerance (+/- 0.1mm)
T_mount = Mounting hole clearance (hole_dia - screw_dia) / 2
T_enclosure = Enclosure machining tolerance (+/- 0.1mm for CNC)
T_connector = Connector body to pin tolerance (+/- 0.1mm typical)
Example: Standard assembly
T_pcb = 0.1mm
T_mount = (3.2 - 3.0) / 2 = 0.1mm (M3 screw in 3.2mm hole)
T_enclosure = 0.1mm (CNC aluminum)
T_connector = 0.1mm
T_total = sqrt(0.01 + 0.01 + 0.01 + 0.01) = 0.2mm
Panel cutout must be oversized by T_total on each side.
For a USB-A connector (12mm wide): cutout = 12 + 2*0.2 = 12.4mm minimum
Recommended cutout: 12.5-12.8mm (with gasket for aesthetics)
| Connector Type | Mating Face (WxH) | Recommended Cutout | Notes |
|---|---|---|---|
| USB Type-A | 12.0 x 4.5mm | 12.5 x 5.2mm | Allow for shell tolerance |
| USB Type-C | 8.94 x 3.26mm | 9.5 x 3.8mm | Tight tolerance required |
| RJ45 | 16.0 x 13.0mm | 16.5 x 13.5mm | Include LED window if equipped |
| HDMI Type-A | 14.0 x 4.55mm | 14.5 x 5.2mm | Chamfer corners on cutout |
| DB-9 | 30.8 x 12.5mm | 31.5 x 13.0mm | Include screw boss holes |
| SMA (bulkhead) | 6.35mm dia | 6.5mm dia | Use connector's own panel mount |
| DC barrel jack | 8-14mm dia | Per connector spec | Depth clearance critical |
A USB connector is placed at the board edge, but the enclosure has the board mounted 2mm below the panel center. The connector mating face is now 2mm too low relative to the cutout, causing cable strain and poor contact. Solution: Use right-angle connectors with the correct offset, or mid-mount connectors that center the mating face relative to the board surface. Always verify Z-axis alignment in 3D, not just X-Y position.
Keep-out zones are defined for all mechanical interference areas: heatsinks, shields, mounting hardware, cable routes, moving parts. Keep-outs are enforced on correct layers (top, bottom, or both) and verified by DRC.
| Keep-Out Type | Applies To | Typical Definition |
|---|---|---|
| Component height keep-out | Areas under mechanical parts | Region with max height constraint |
| Routing keep-out | Areas where no copper allowed | Under antenna, near board edge for EMC |
| Via keep-out | Areas where no via drilling allowed | Under BGA center pad (pre-applied thermal compound) |
| Component keep-out | No components in region | Under heatsink, access panel, test fixture |
| All-layer keep-out | No copper on any layer | Antenna clearance, flex fold zone |
All copper features, components, and vias maintain minimum clearance from the board edge. Edge clearance prevents copper exposure during routing and provides manufacturing margin. V-score areas have additional component clearance.
| Feature | Min Distance from Edge | Recommended | Reason |
|---|---|---|---|
| Copper trace/pour | 0.25mm (10mil) | 0.5mm (20mil) | Router tolerance + copper exposure prevention |
| Via (edge of hole) | 0.5mm (20mil) | 0.75mm (30mil) | Drill registration + structural integrity |
| SMD component (body) | 0.5mm | 1.0mm | Pick-and-place accuracy, wave solder clearance |
| Through-hole component | 1.0mm | 2.0mm | Lead clearance during wave soldering |
| BGA component | 3.0mm | 5.0mm | Rework access, underfill flow |
| Component near V-score | 1.0mm from score line | 2.0mm | Stress during depanelization |
Some designs require copper plating on the board edge (for EMC grounding to enclosure, or edge-mounted connectors). This requires a special fabrication process: the board is first plated as a larger panel, then routed. If not specified, the fabricator will route the edge and expose bare FR-4. Always call out "Edge Plating Required" on specific edges with minimum plating thickness (typically 25um copper).
Assembly tooling holes (fiducials) are present for pick-and-place machine registration. Global fiducials at board corners and local fiducials near fine-pitch components are correctly specified. Fiducial design meets IPC-7351 requirements.
| Fiducial Type | Quantity | Placement | Specification |
|---|---|---|---|
| Global (board-level) | Minimum 3 | At least 3 corners, maximum diagonal separation | 1.0mm copper dot, 2.0mm mask opening |
| Local (component-level) | 2 per component | Diagonal corners of fine-pitch ICs | 1.0mm copper dot, 2.0mm mask opening |
| Panel fiducial | 3 per panel | Panel frame corners | Same as global |
Global Fiducial Mark:
- Shape: Round copper pad (circle)
- Diameter: 1.0mm (typical), range 1.0-3.0mm
- Mask clearance: 1.0mm beyond pad edge (total opening = pad + 2mm)
- No silkscreen within clearance zone
- Copper: Bare copper (not covered by mask or silk)
- Surface finish: Same as pads (HASL, ENIG, etc.)
- Background: Solder mask (contrasting color) around the mark
Placement rules:
- Minimum 5mm from board edge
- Not symmetrically placed (machine needs orientation reference)
- Clear area around fiducial: 3mm radius free of other copper features
- At least 2 fiducials required; 3 recommended (allows rotation detection)
Altium: File > Export > STEP 3D. Ensure all 3D bodies are assigned to components. Set export options to include board body, components, and mounting hardware.
KiCad: File > Export > STEP. KiCad uses .wrl (VRML) or .step models from component libraries. Verify models are assigned in Footprint Properties > 3D Models tab.
Allegro: Export via File > Export > STEP or use Allegro's native 3D Viewer. Requires component 3D models in the library.
| Issue | Root Cause | Cost of Failure | Prevention |
|---|---|---|---|
| Board does not fit enclosure | Outline dimensions wrong or tolerance stack-up | New board revision or enclosure modification | 3D fit check with tolerance analysis |
| Connector misaligned with cutout | Position error or height mismatch | Mechanical rework or new panel | STEP model verification before tape-out |
| Component hits enclosure rib | Missing height keep-out zone | Component relocation = new board revision | Import full enclosure model with ribs/features |
| Screw crushes bottom component | No bottom-side keep-out at mounting holes | Component damage at assembly | Define keep-outs on BOTH sides |
| Board warps when screwed down | Mounting holes not coplanar with chassis bosses | Board stress, cracked solder joints | Verify flatness tolerance of chassis bosses |
| Cannot access test points | Test points under heatsink or shield | Cannot debug in production | Test point accessibility review with fixtures |
Many EDA library components have inaccurate or missing 3D models. A component shown as 5mm tall in the 3D viewer might actually be 8mm tall when the solder joint height, PCB thickness, and component body tolerance are considered. Always verify 3D model accuracy against the component datasheet dimensional drawing. For critical clearance checks (less than 2mm margin), measure the actual component sample with calipers rather than relying on the 3D model.